An important integrated circuit product which is implemented on an integrated circuit (IC) chip includes a volatile semiconductor memory known as a static random access memory (SRAM). The SRAM is characterized by low standby power consumption and high memory cell density. The generation of valid logic signals and the retention of data in such integrated memory circuits having volatile memory cells depend in part on maintenance of power supply voltages within specified limits. In conventional integrated circuit memory devices, internal circuits sense the external source voltage being applied to determine if it is sufficient for reliable operation. In response to a low voltage condition, control signals are generated which cause active chips to be deselected and maintained in standby condition. This is usually carried out by means of true and complement chip select signals, CS and CS, respectively, which inhibit read/write operations until the low voltage condition has been corrected.
During the period that a memory chip is in the unselected condition, it is necessary to maintain the charge levels of the storage capacitors in the volatile memory cells so that stored data will be retained. Otherwise, the information stored in the memory cells, including programs and data, will be lost when main power is removed. Although the loss of power does not result in memory circuit damage, the loss of stored information requires that the memory be reloaded with programs and data before processing can be reestablished.